This invention relates to a CAMRAM (content addressable memory random access memory) cache memories and, more particularly, to a structure and method that allows at least two CAM memories to be associated with a single RAM memory. With the increasing size of memory elements, along with the requirement of faster access time and smaller available areas on ASIC (Application Specific Integrated Circuit) chips, improved architecture of the CAMRAM base design is desired to address these issues effectively.
According to the present invention, an improved structure and method of operation are provided wherein a single RAM (random access memory) can be serviced by two CAMs (content addressable memory). This is accomplished by providing first actuating circuitry operably associated with and operatively connecting a first CAM to a selected portion of the RAM and second actuating circuit associated with and operably connecting a second CAM to a second portion of the RAM. The first actuating circuitry includes circuitry to actuate a selected wordline responsive to a CAM search read and RAM search read and circuitry to initiate a CAMRAM index read and index write operably responsive to given control logic. The second circuitry includes circuitry to actuate a selected wordline responsive to a CAM search read and RAM search read responsive to given control logic.